1. Field of the Invention
This invention relates primarily to a method of gate work function adjustment, and more particularly to a method of adjusting gate work function by ion implantation.
2. Description of the Prior Art
In order to provide semiconductor devices with a more rapid operational speed and increased integration degree, a fin field effect transistor (FinFET), which have a structure capable of reducing the short channel effect is invented. The FinFET may include an active region having a three-dimensional fin shape. The fin may be surrounded by a gate electrode. Thus, a three-dimensional channel may be formed along a surface of the fin. Because the channel is formed on an upper surface and sidewalls of the fin, the FinFET may have a larger effect channel width in a relatively small horizontal area. Thus, a semiconductor device having the FinFET may have a relatively small size and a more rapid operational speed.
To simplify the fabricating process, conventionally, a single work function gate is used throughout the fabrication process. Typically, the gate conductor is N+ type polysilicon gate. This results in significant cost savings in fabricating process. However, the N+ type polysilicon gate could result extremely low threshold voltage. To prevent the low threshold voltage, a P+ type polysilicon gate is implemented. Although the P+ type polysilicon gate provides suitable threshold voltage, but it leads to severe gate induced drain leakage.